Paper
A Lock-Free, Fully GPU-Resident Architecture for the Verification of Goldbach's Conjecture
Authors
Isaac Llorente-Saguer
Abstract
We present a fully device-resident, multi-GPU architecture for the large-scale computational verification of Goldbach's conjecture. In prior work, a segmented double-sieve eliminated monolithic VRAM bottlenecks but remained constrained by host-side sieve construction and PCIe transfer latency. In this work, we migrate the entire segment generation pipeline to the GPU using highly optimised L1 shared-memory tiling, achieving near-zero host-device communication during the critical verification path. To fully leverage heterogeneous multi-GPU clusters, we introduce an asynchronous, lock-free work-stealing pool that replaces static workload partitioning with atomic segment claiming, enabling $99.7$% parallel efficiency at 2 GPUs and $98.6$% at $4$ GPUs. We further implement strict mathematical overflow guards guaranteeing the soundness of the 64-bit verification pipeline up to its theoretical ceiling of $1.84 \times 10^{19}$. On the same hardware, the new architecture achieves a $45.6\times$ algorithmic speedup over its host-coupled predecessor at N = $10^{10}$. End-to-end, the framework verifies Goldbach's conjecture up to $10^{12}$ in $36.5$ seconds on a single NVIDIA RTX 5090, and up to $10^{13}$ in $133.5$ seconds on a four-GPU system. All code is open-source and reproducible on commodity hardware.
Metadata
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"raw_xml": "<entry>\n <id>http://arxiv.org/abs/2603.07850v1</id>\n <title>A Lock-Free, Fully GPU-Resident Architecture for the Verification of Goldbach's Conjecture</title>\n <updated>2026-03-08T23:58:47Z</updated>\n <link href='https://arxiv.org/abs/2603.07850v1' rel='alternate' type='text/html'/>\n <link href='https://arxiv.org/pdf/2603.07850v1' rel='related' title='pdf' type='application/pdf'/>\n <summary>We present a fully device-resident, multi-GPU architecture for the large-scale computational verification of Goldbach's conjecture. In prior work, a segmented double-sieve eliminated monolithic VRAM bottlenecks but remained constrained by host-side sieve construction and PCIe transfer latency. In this work, we migrate the entire segment generation pipeline to the GPU using highly optimised L1 shared-memory tiling, achieving near-zero host-device communication during the critical verification path. To fully leverage heterogeneous multi-GPU clusters, we introduce an asynchronous, lock-free work-stealing pool that replaces static workload partitioning with atomic segment claiming, enabling $99.7$% parallel efficiency at 2 GPUs and $98.6$% at $4$ GPUs. We further implement strict mathematical overflow guards guaranteeing the soundness of the 64-bit verification pipeline up to its theoretical ceiling of $1.84 \\times 10^{19}$. On the same hardware, the new architecture achieves a $45.6\\times$ algorithmic speedup over its host-coupled predecessor at N = $10^{10}$. End-to-end, the framework verifies Goldbach's conjecture up to $10^{12}$ in $36.5$ seconds on a single NVIDIA RTX 5090, and up to $10^{13}$ in $133.5$ seconds on a four-GPU system. All code is open-source and reproducible on commodity hardware.</summary>\n <category scheme='http://arxiv.org/schemas/atom' term='cs.MS'/>\n <category scheme='http://arxiv.org/schemas/atom' term='cs.DC'/>\n <category scheme='http://arxiv.org/schemas/atom' term='cs.PF'/>\n <category scheme='http://arxiv.org/schemas/atom' term='math.NT'/>\n <published>2026-03-08T23:58:47Z</published>\n <arxiv:comment>14 pages, 4 figures, 3 tables. The presented work details a major architectural overhaul: migration of the segmented sieve to GPU L1 shared memory and the implementation of a lock-free multi-GPU work pool. Source code available at: https://github.com/isaac-6/goldbach-gpu</arxiv:comment>\n <arxiv:primary_category term='cs.MS'/>\n <author>\n <name>Isaac Llorente-Saguer</name>\n </author>\n </entry>"
}