Paper
Formal Mechanistic Interpretability: Automated Circuit Discovery with Provable Guarantees
Authors
Itamar Hadad, Guy Katz, Shahaf Bassan
Abstract
*Automated circuit discovery* is a central tool in mechanistic interpretability for identifying the internal components of neural networks responsible for specific behaviors. While prior methods have made significant progress, they typically depend on heuristics or approximations and do not offer provable guarantees over continuous input domains for the resulting circuits. In this work, we leverage recent advances in neural network verification to propose a suite of automated algorithms that yield circuits with *provable guarantees*. We focus on three types of guarantees: (1) *input domain robustness*, ensuring the circuit agrees with the model across a continuous input region; (2) *robust patching*, certifying circuit alignment under continuous patching perturbations; and (3) *minimality*, formalizing and capturing a wide array of various notions of succinctness. Interestingly, we uncover a diverse set of novel theoretical connections among these three families of guarantees, with critical implications for the convergence of our algorithms. Finally, we conduct experiments with state-of-the-art verifiers on various vision models, showing that our algorithms yield circuits with substantially stronger robustness guarantees than standard circuit discovery methods, establishing a principled foundation for provable circuit discovery.
Metadata
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Raw Data (Debug)
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"raw_xml": "<entry>\n <id>http://arxiv.org/abs/2602.16823v1</id>\n <title>Formal Mechanistic Interpretability: Automated Circuit Discovery with Provable Guarantees</title>\n <updated>2026-02-18T19:41:01Z</updated>\n <link href='https://arxiv.org/abs/2602.16823v1' rel='alternate' type='text/html'/>\n <link href='https://arxiv.org/pdf/2602.16823v1' rel='related' title='pdf' type='application/pdf'/>\n <summary>*Automated circuit discovery* is a central tool in mechanistic interpretability for identifying the internal components of neural networks responsible for specific behaviors. While prior methods have made significant progress, they typically depend on heuristics or approximations and do not offer provable guarantees over continuous input domains for the resulting circuits. In this work, we leverage recent advances in neural network verification to propose a suite of automated algorithms that yield circuits with *provable guarantees*. We focus on three types of guarantees: (1) *input domain robustness*, ensuring the circuit agrees with the model across a continuous input region; (2) *robust patching*, certifying circuit alignment under continuous patching perturbations; and (3) *minimality*, formalizing and capturing a wide array of various notions of succinctness. Interestingly, we uncover a diverse set of novel theoretical connections among these three families of guarantees, with critical implications for the convergence of our algorithms. Finally, we conduct experiments with state-of-the-art verifiers on various vision models, showing that our algorithms yield circuits with substantially stronger robustness guarantees than standard circuit discovery methods, establishing a principled foundation for provable circuit discovery.</summary>\n <category scheme='http://arxiv.org/schemas/atom' term='cs.LG'/>\n <category scheme='http://arxiv.org/schemas/atom' term='cs.LO'/>\n <published>2026-02-18T19:41:01Z</published>\n <arxiv:comment>To appear in ICLR 2026</arxiv:comment>\n <arxiv:primary_category term='cs.LG'/>\n <author>\n <name>Itamar Hadad</name>\n </author>\n <author>\n <name>Guy Katz</name>\n </author>\n <author>\n <name>Shahaf Bassan</name>\n </author>\n </entry>"
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